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preliminary mbf110 solid-state fingerprint sensor applications database and network access portable ?gerprint acquisition access control (home, auto, of?e, etc.) ?tm smart cards cellular phone security access overview the fujitsu mbf110 solid-state fingerprint sensor is a direct contact, ?gerprint acquisition device. it is a high performance, low power, low cost, capacitive sensor with an integrated two- dimensional array of metal electrodes in the sensing array. each metal electrode acts as one plate of a capacitor and the contacting ?ger acts as the second plate. a passivation layer on the device surface forms the dielectric between these two plates. ridges and valleys on the ?ger yield varying capacitor values across the array, which is read to form an image of the ?gerprint. the mbf110 is manufactured in standard cmos technology and is available in an 80-pin, vspa 80/1 and lqfp 80/1. the 300 300 sensor array has a 50 m pitch and yields a 500-dpi image. the sensor surface is protected by a patented, ultra-hard, abrasion and chemical resistant coating. 80-pin tsop (lqfp) 80-pin sop (vspa) packages a block diagram of the mbf110 is shown in figure 1. the mbf110 has an integrated 8-bit ?sh analog-to-digital converter to digitize the output of the sensor array. the ?gerprint image is transmitted on an 8-bit bi-directional bus interface compatible with most microprocessors. for setcur resistor differences between the mbf110 see the pin information table. features non-optical solid-state device 300 300 sensor array, 50 m pitch 1.5 cm 1.5 cm sensor area 500-dpi resolution operation from 3v to 5.5v ultra-hard protective coating integrated 8-bit ?sh analog-to-digital converter 8-bit microprocessor interface standard cmos technology low power, less than 200 mw

preliminary mbf110 fujitsu microelectronics, inc. -1 table of contents chip operation ................................................................................................................. ....................................................1 special features ............................................................................................................... .....................................................2 mbf110 pin information for sop 80/1 ............................................................................................ ...................................... 2 mbf110 connection diagram ...................................................................................................... ..........................................3 function table ................................................................................................................. .....................................................4 register map ................................................................................................................... .....................................................4 address register descriptions .................................................................................................. ...............................................4 ral (a3-a0 address 0000) write only ........................................................................................... ..................................4 low order row address register ................................................................................................. ...............................4 rah (a3-a0 address 0001) write only ........................................................................................... .................................5 high order row address register ................................................................................................ ...............................5 cal (a3-a0 address 0010) read/write............................................................................................ .................................5 low order column address register .............................................................................................. .............................5 cah (a3-a0 address 0011) write only ............................................................................................ .................................6 high order column address register ............................................................................................. .............................6 dtr (a3-a0 address 0100) write only ............................................................................................ .................................6 discharge time register ........................................................................................................ ....................................6 dcr (a3-a0 address 0101) write only ............................................................................................ .................................7 discharge current register..................................................................................................... ...................................7 rsr (a3-a0 address 0110) write only ............................................................................................ ..................................7 reserved....................................................................................................................... ...........................................7 row capture and a/d conversion timing .......................................................................................... .......................................8 a/d converter .................................................................................................................. ....................................................8 speci?ations .................................................................................................................. ......................................................8 absolute maximum ratings ....................................................................................................... .............................................8 operating range ................................................................................................................ ...................................................8 dc electrical characteristics .................................................................................................. ................................................8 power supply characteristics, (v dd = 5.5v, f osc = 40 mhz standard temperature range).......................................................................................... ........9 power supply characteristics, (v dd = 3.6v, commercial temperature range, f osc = 20 mhz ) ............................................................................................9 read cycle timing at v dd = 3.0v, standard temperature range............................................................................................ ....10 write cycle timing at v dd = 3.0v, standard temperature range............................................................................................ ...11 power up and initialization.................................................................................................... ..............................................12 image capture .................................................................................................................. ..................................................13 fujitsu microelectronics, inc.
preliminary solid-state fingerprint sensor 0 fujitsu microelectronics, inc. mbf110 ?pfw1, sop (vspa) ?80 pin package ..................................................................................... ............................. 14 mbf110 ?pfw, tsop (lqfp) ?80 pin package ..................................................................................... ............................. 15 mbf110 solder pad layout....................................................................................................... .......................................... 16 manufacturing considerations................................................................................................... ........................................... 17 array pixel speci?ations ...................................................................................................... .............................................. 17 mbf110 ordering information .................................................................................................... ........................................ 18 fujitsu microelectronics, inc.
preliminary mbf110 fujitsu microelectronics, inc. 1 figure 1. mbf110 block diagram oscillator data bus buffer dcr rah ral cah cal rsr dtr 300 x 300 sensor arrays control logic mux 8 bit a/d temperature sensor resistance sensor clk out select logic a [3:0] ce1 ce2 rd wr d[7:0] test xtal1 xtal2 encl k rsense clk set cur chip operation the sensor array is composed of 300 rows and 300 columns of sensor plates. associated with each column are two sample-and-hold circuits. a ?gerprint image is sensed or captured one row at a time. this ?ow capture occurs in two phases. in the ?st phase, the sensor plates of the selected row are pre-charged to the v dd voltage. during this pre-charge period, an internal signal enables the ?st set of sample-and-hold circuits to store the pre-charged plate voltages of the row. in the second phase, the row of sensor plates is discharged with a current source. the rate at which a cell is discharged is proportional to the ?ischarge current. after a period of time (referred to as the ?ischarge time?, an internal signal enables the second set of sample-and-hold circuits to store the ?al plate voltages. the difference between the pre-charged and discharged plate voltages is a measure of the capacitance of a sensor cell. after the row capture, the cells within the row are ready to be digitized. the sensitivity of the chip is adjusted by changing the discharge current and discharge time. the nominal value of the current source is controlled by an external resistor connected between the setcur pin and ground. the current source is controlled from the discharge current register (dcr). the discharge time is controlled by the discharge time register (dtr). the sensor array is a row-oriented device. images are read out one row at a time. the high-order row address register (rah) and the low-order row address register (ral) must be programmed to select a row to be captured. writing to ral initiates a row capture. the capture time is a function of the external clock and the dtr. after the discharge cycle, the outputs of the row elements will be stored in analog sample and hold circuits.
preliminary solid-state fingerprint sensor 2 fujitsu microelectronics, inc. after the row capture is completed, the high-order column address register (cah) and low-order column address register (cal) must be programmed to select an element within the captured row to be digitized. writing to cal causes the analog-to-digital (a/d) converter to digitize the difference between the outputs of the two sample-and-holds of the selected column cell. the output of the a/d converter is accessed by reading the cal register. rows can be accessed in any order; however, the selected row must be captured before the column cells are read. the column cells within a row can be accessed in any order. special features there are two programmable open-drain outputs that can be used for driving leds. the clkout pin can be enabled to output a square-wave clock of the same frequency as the oscillator clock. clkout can be used to drive external circuitry. when enclk is high, the clock signal is present at the clkout pin. when enclk is low or unconnected, the clkout output is held low. mbf110 pin information for sop (vspa) 80/1 pin number pin name type description notes 34 a3 input address inputs address signals connected to these pins select a register to read from or write to dur- ing data transfer. 35 a2 36 a1 37 a0 38 ce1 chip enable, active low when ce1 is low and ce2 is high, the chip is selected. 39 ce2 chip enable, active high when ce1 is low and ce2 is high, the chip is selected. 40 rd read enable, active low this pin must be low while wr is high and the chip selected in order to read a register on the chip. 17 wr write enable, active low this pin must be low while the chip is selected to write to a register on the chip. 18 d7 bi-directional data bus inputs when wr is low and chip is selected. outputs when rd is low, wr is high, and chip is selected. 19 d6 21 d5 22 d4 24 d3 25 d2 26 d1 27 d0 32 clkout output clock output this pin outputs the oscillator clock frequency when enclk is high. 31 enclk input enable clock output a high on this pin enables the clkout pin. a low on this pin holds clkout low. enclk has an internal pull-down resistor. 15 led1 open-drain output led driver this pin can be used to drive an led. 14 led2 open-drain output 3 setcur input set discharge current place an external resistor r1 (200k ?680k ohms) between this pin and ground. typical: fps110, r1 = 680k; fps110b, r1 = 200k; fps110e, r1 = 200k 2 n/a reserved pin must be left disconnected. 13 test 20, 33 v dd power digital power supply 1v dda analog power supply
preliminary mbf110 fujitsu microelectronics, inc. 3 mbf110 connection diagram 16, 23, 28 v ss ground digital ground 4, 5 v ssa (center) analog ground 29 xtal1 input input to the on-chip oscillator to use the internal oscillator connect a crystal circuit to this pin. if an external oscilla- tor is used, its output is connected to this pin. xtal1 is the clock source for internal timing. 30 xtal2 output output of the on-chip oscillator to use the internal oscillator connect a crystal circuit to this pin. if an external oscilla- tor is used, leave xtal2 unconnected. 41-80 gndshld shield ground connected to package top plate these pins should connect to chassis ground. 2, 6-12 n/a n/a not connected. mbf110 pin information for sop (vspa) 80/1 (continued) pin number pin name type description notes vdda reserved setcur vssa vssa unconnected unconnected unconnected unconnected unconnected unconnected unconnected test led2 led1 vss vss vss wr- d7 d6 vdd vdd d5 d4 d3 d2 d1 d0 xtal1 xtal2 enclk clkout a3 a2 a1 a0 ce1- ce2 rd- gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld gndshld 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
preliminary solid-state fingerprint sensor 4 fujitsu microelectronics, inc. function table register map ce1 ce2 rd wr mode data lines h x x x de-selected high-z x l x x de-selected high-z l h h h standby high-z lhlh read data out l h h l write data in a3 a2 a1 a0 access register description 0000 write ral low order row address register 0001 write rah high order row address register 0010 read/write cal low order column address register 0011 write cah high order column address register 0100 write dtr discharge time register 0101 write dcr discharge current register 0110 write rsr reserved msb lsb bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 ra7 ra6 ra5 ra4 ra3 ra2 ra1 ra0 bit number bit name function [7:0] ra[7:0] low eight bits of row address register. address register descriptions refer to row capture and a/d conversion timing on page 9 to calculate row capture and a/d conversion times. ral (a3-a0 address 0000) write only low order row address register this register and bit 0 of rah form the 9-bit row address register that selects the row to be captured. the 9-bit row address register selects a row address from 0 through 299. writing the ral starts a row capture. only ral has to be written if rah doesnt change, otherwise rah has to be written before ral.
preliminary mbf110 fujitsu microelectronics, inc. 5 rah (a3-a0 address 0001) write only high order row address register bit 0 of this register and ral form the 9-bit row address register that selects the row to be converted. the l1 and l2 bits control two open-drain outputs that can be used to drive leds. msb lsb bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 l1l2ra8 bit number bit name function 7l1 l1=0, led1 output low l1=1, led1 output high-z 6l2 l2=0, led 2 output low l2=1, led 2 output high-z [5:1] reserved, write 0 to these bits. 0 ra8 msb of row address cal (a3-a0 address 0010) read/write low order column address register cal is a read/write register. writing to this address writes to the low-order 8 bits of the 9-bit column address register. the 9-bit column address register selects a column from 0 through 299. writing to cal causes the analog-to-digital (a/d) converter to begin digitizing its input. the input of the a/d converter is selected by bits 7 and 6 of the cah register. the user should wait until the row capture is completed before writing to the cal. reading from this address returns the output of the a/d converter. after writing to cal, the user should wait until a/d conversion completes before reading the a/d converter. msb lsb bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 ca7 ca6 ca5 ca4 ca3 ca2 ca1 ca0 bit number bit name function [7:0] ca[7:0] (write) low eight bits of column address register. (read) output of a/d converter.
preliminary solid-state fingerprint sensor 6 fujitsu microelectronics, inc. cah (a3-a0 address 0011) write only high order column address register bit 0 of this register and cal form the 9-bit column address register that selects a cell from the current row for digitizing. the user should wait until the row capture is completed before writing to cah. msb lsb bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rtca8 bit number bit name function [7:1] reserved, write 0 to these bits. 0 ca8 msb of column address register dtr (a3-a0 address 0100) write only discharge time register msb lsb bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 pd t6 t5 t4 t3 t2 t1 t0 bit number bit name function 7pd power down chip. pd=0, chip in normal mode pd=1, chip in low power mode [6:0] t[6:0] selects the count to be loaded into the discharge timer. discharge time is selected in increments of the oscillator period. discharge time is de?ed as the period between the sampling and holding of the pre-charged sensor cell to the sampling and holding of the discharging sensor cell. the discharge time can be calculated from the following equation: discharge time = t[6:0] * t osc
preliminary mbf110 fujitsu microelectronics, inc. 7 dcr (a3-a0 address 0101) write only discharge current register msb lsb rsr (a3-a0 address 0110) write only reserved the user must initialize this resistor to zero. msb lsb bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 f2 f1 trst dc4 dc3 dc2 dc1 dc0 bit number bit name function [7:6] f2, f1 these two bits tell the chip the frequency of the external oscillator or crystal that is connected to the chip. f2 f1 xtal input 0 0 10-15 mhz 0 1 15-20 mhz 1 0 20-30 mhz 1 1 30-40 mhz 5 trst timer reset. set this bit to halt and reset the discharge timer. resetting the discharge timer is necessary to put the discharge timer in a known state after power-up or after returning to normal mode from low-power mode (see bit 7 of dtr). trst=0,normal timer operation trst=1,halt and clear discharge timer (doesn? clear dtr) [4:0] dc[4:0] selects the discharge current source value. bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 bit number bit name function [7:0] reserved. write 0 to these bits.
preliminary solid-state fingerprint sensor 8 fujitsu microelectronics, inc. row capture and a/d conversion timing note: n is selected by bits t[6:0] of dtr. f2 f1 xtal input range row capture time in osc clock periods a/d conversion time in osc clock periods 0 0 10-15 mhz 18+n 13 0 1 15-20 mhz 24+n 15 1 0 20-30 mhz 36+n 23 1 1 30-40 mhz 48+n 30 a/d converter the integrated 8-bit ?sh a/d converter is a buffered device. each write to cal causes: 1) the result of the previous conversion to be latched and made readable at cal, and 2) the a/d converter to start digitizing its current input. consequently, it takes 301 writes to cal in order to digitize the 300 cells of a row. speci?ations* *all speci?ations in this document are preliminary and subject to change. absolute maximum ratings storage temperature: -65?to +150?c dc voltage applied to any pins: -0.5 v to +7.0 v operating range dc electrical characteristics symbol parameter min max unit v dd digital supply voltage +3.0 +5.5 v v dda analog supply voltage +3.0 +5.5 v standard temperature range 0 60 c f osc oscillator frequency v dd = 5.0v v dd = 3.0v 10 40 mhz 10 20 mhz symbol parameter test conditions min max unit v oh output high voltage v dd = 4.5v, i oh = -4 ma 2.4 v v ol output low voltage v dd = 4.5v, i ol = 8 ma 0.4 v v oh output high voltage v dd = 3.0v, i oh = -2 ma 2.4 - v v ol output low voltage v dd = 3.0v, i ol = 4 ma 0.4 v v ih input high voltage 2.0 v dd v v il input low voltage v dd = 4.5v -0.5 0.8 v v il input low voltage v dd = 3.00 -0.5 0.6 v i li input leakage current gnd v in 5.5v -5.0 5.0 a i lo output leakage current gnd v out 5.5v -5.0 5.0 a
preliminary mbf110 fujitsu microelectronics, inc. 9 power supply characteristics (v dd = 5.5v, f osc =40 mhz standard temperature range) note: analog supply currents are independent of f osc note: xtal2 & clkout driving c load = 50pf power supply characteristics v dd = 3.6v, commercial temperature range, f osc = 20 mhz note: analog supply currents are independent of f osc note: xtal2 & clkout driving c load = 50 pf symbol parameter test conditions typ max unit lp std lp std i dd1 digital supply current power down with clkout disabled, (dtr bit 7 = 1, enclk = 0) <1 100 50 100 a i dd2 power down with clkout enabled. ( dtr bit 7 = 1, enclk = 1) 17 20 20 25 ma i dd3 idle with clkout disabled. (dtr bit 7 = 0, enclk = 0) 8 101215 ma i dd4 idle with clkout enabled. ( dtr bit 7 = 0, enclk = 1) 17 20 20 25 ma i dd5 active a/d conversion with clkout disabled. (dtr bit 7 = 0, enclk = 0) 15 20 25 30 ma i dd6 active a/d conversion with clkout enabled. (dtr bit 7 = 0, enclk = 1) 25 30 30 35 ma i dda analog supply current power down with clk disabled or enabled. (dtr bit 7 = 1) <10 <100 50 1000 a idle with clkout disabled or enabled, (dtr bit 7 = 0) 15 20 22 25 ma active a/d conversion with clkout disabled or enabled. (dtr bit 7 = 0) 18 22 26 30 ma symbol parameter test conditions typ max unit lp std lp std i dd1 digital supply current power down with clkout disabled. (v dd = max , f o sc = max, dtr bit 7 = 1, enclk = 0) <1 <10 50 100 a i dd2 power down with clkout enabled. (v dd = max, f o sc = max, dtr bit 7 = 1, enclk = 1) 6 101015 ma i dd3 idle with clkout disabled. (v dd = max, f o sc = max, dtr bit 7 = 0, enclk = 0) 3 5 6 10 ma i dd4 idle with clkout enabled. (v dd = max, f o sc = max, dtr bit 7 = 0, enclk = 1) 6 101015 ma i dd5 active a/d conversion with clkout disabled. (v dd = max, f o sc = max, dtr bit 7 = 0, enclk = 0) 6 10 10 15 ma i dd6 active a/d conversion with clkout enabled. (v dd = max, f o sc = max, dtr bit 7 = 0, enclk = 1) 9 131318 ma i dda analog supply current power down with clk disabled or enabled. (v dda = max, dtr bit 7 = 1) <2 <10 50 1000 a idle with clkout disabled or enabled, (dtr bit 7 = 0) 10 15 15 20 ma active a/d conversion with clkout disable or enable. (dtr bit 7 = 0) 12 15 18 25 ma
preliminary solid-state fingerprint sensor 10 fujitsu microelectronics, inc. read cycle timing at v dd = 3.0v, standard temperature range figure 2. read cycle timing parameter description min max unit t aac address valid to data valid. 70 ns t rc read cycle time 70 ns t ace1 ce1 low to data valid 70 ns t ace2 ce2 high to data valid 70 ns t doe rd low to data valid 35 ns t lzoe rd low to low z 5 ns t hzoe rd high to high z 30 ns t lzce ce1 low and ce2 high to low z 5 ns t hzce ce1 high to high z or ce2 low to high z 30 ns t lzwe wr high to low z 5 ns t hzwe wr low to high z 30 ns a[3:0] ce1 ce2 rd wr data out t aac t rc t ace1 t ace2 t doe t hzoe t hzwe t lzwe t lzoe t lzce t hzce data valid high z
preliminary mbf110 fujitsu microelectronics, inc. 11 write cycle timing at v dd = 3.0v, standard temperature range figure 3. write cycle timing parameter description min max unit t wc write cycle 70 ns t sce1 ce1 low to write end 60 ns t sce2 ce2 high to write end 60 ns t aw address setup to write end 55 ns t ha address hold from write end 5 ns t sa address set-up to write start 5 ns t pwe wr pulse width 40 ns t sd data setup to write end 35 ns t hd data hold from write end 5 ns ce1 ce2 rd wr data in t sa t ha t aw t sce1 t sce2 t pwe t sd t hd a[3:0]
preliminary solid-state fingerprint sensor 12 fujitsu microelectronics, inc. power up and initialization write dtr with pd bit set power-up set dtr[7] (pd) to power down device. wait 1 s write dtr with pd bit clear write dcr with trst set write dcr with trst clear wait for chip to power down. clear trst for normal dicharge timer operation. dcr[4:0] initialized to known values. wait for chip to return from power-down. clear dtr[7] (pd) to return from power-down. dtr[6:0] initialized to known values. set dcr[5] (trst) to halt and reset the discharge timer. initialize rsr to zero. clear rsr initialization done wait 10 s
preliminary mbf110 fujitsu microelectronics, inc. 13 image capture write rah if needed begin image capture initiates row capture. write cah write cal wait until row capture completes write ral first a/d conversion of image wait until a/d conversion completes write cal write cah if needed wait until a/d conversion completes read cal write cal read cal converted all cells in current row? converted last cell of image image captured yes yes yes no no initiates first a/d conversion. read output buffer. initiates a/d conversion and transfers previous result to output buffer. needed to transfer result of last a/d conversion to output buffer. read value of last cell. needed if new value to be written differs from current cah contents needed if new value to be written differs from current rah contents no
preliminary solid-state fingerprint sensor 14 fujitsu microelectronics, inc. mbf110 ?pfw1 sop (vspa) ?80 pin package mbf110-pfw1: sop 80pin assembly diagram mbf110 dimensions symbol description min nom m ax n pin count 80 a overall height a1 stand off b pin width c pin thickness d tip to tip dimension .941 (23.9) .941 (23.9) .0187 (.47) 1.016 (25.8) .008 (.20) .008 (.20) .945 (24.0) .945 (24.0) .032 (.81) .0207 (.53) .949 (24.1) .949 (24.1) 1.032 (26.2) .0197 (.50) 1.025 (26.0) .006 (.15) .102 (2.60) d1 package body package body e1 f pin pitch l1 foot length note: dimensions are in inches (mm) e1 d1 a1 l1 c detail z row 299 column 0 detail z row 0 column 0 row 299 column 299 row 0 column 299 b f d 140 a
preliminary mbf110 fujitsu microelectronics, inc. 15 mbf110 ?pfw tsop (lqfp)?80 pin package mbf110-pfw: tsop 80pin assembly diagram symbol description mbf110pfw dimensions min. nom. max. min. nom. millimeters inches max. a a1 a2 b d1 d3 ddd e e1 e3 e l l1 1.45 0.10 1.35 0.16 14.95 0.25 14.95 0.50 1.55 0.15 1.40 0.25 24.00 bsc. 15.00 0.30 26.00 bsc. 24.00 bsc. 15.00 0.50 typ. 0.60 1.00 ref. 1.70 0.25 1.45 0.30 15.05 0.35 15.05 0.70 0.57 .004 .053 .006 .588 .010 .588 .020 0.61 .006 .055 .010 .945 bsc. .590 .012 1.024 bsc. .945 bsc. .590 .0197 typ. .024 .039 ref. 0.67 .010 .057 .012 .592 .014 .592 .028 overall height stand off package thickness lead width package body sensor array width sensor array depth tip to tip dimension package body sensor array height lead pitch lead length foot length d1 see detail ?b? a2 1 40 ddd aa d3 e3 c h 2 1.40 0.05 ddd 15 typ d.25 ref. plane detail ? b ? 3 -5 l l1 e b e1 1 a1 sensor array 1.00 dia. pin no. 1 identifier a seating plane seating plane e
preliminary solid-state fingerprint sensor 16 fujitsu microelectronics, inc. mbf110 solder pad layout symbol description dimension n pin count pad length pad width 80 a tip to tip dimension 1.074 (27.30) p pitch .0197 ( .50) l .065 (1.65) w .012 (.30) note: dimensions are in inches (mm) p l a 140 w see detail z full radius typical
preliminary mbf110 fujitsu microelectronics, inc. 17 manufacturing considerations ca ution : do not use any metal pickup tools which would contact the sensor device surface without protective lid installed surface mount re?w temperature: recommended 220 c max re?w spike* max temp 240 c avoid any high pressure spray directly to the sensor device surface. use standard handling practices for esd sensitive devices. refer to fujitsu pcb assembly for biometric sensor guidelines. array pixel speci?ations: notes: 1) failing rows or columns that fall on rows (0-4) or (295-299) or columns (0-4) or (295-299) are allowed to pass for th e std product due to packaging overlap at the edge of the sensor array. failed rows or columns at the extreme edge of the array do not affect the quality of the acquired fingerprint ima ge. speci?ation mbf110-lp mbf110-std max failed pixels 10 300 max failed rows 0 1 (see note 1) max failed columns 0 1 (see note 1)
preliminary solid-state fingerprint sensor 18 fujitsu microelectronics, inc. mbf110 ordering information mbf110 part number description: mb f110 pfw st g product level es = engineering sample g = production power specification lp = low power (failed pixels < 10) f = fingerprint sensor st = standard power (11 < failed pixel < 300) package type pfw1 = sop (vspa) ? 80 pin pfw = tsop (lqfp) ? 80 pin fujitsu semiconductor id mb = micro block dk = development kit product type

preliminary fujitsu microelectronics, inc. corporate headquarters 3545 north first street, san jose, california 95134-1804 tel: (800) 866-8608 fax: (408) 922-9179 e-mail: fmicrc@fmi.fujitsu.com web site: http://www.fmi.fujitsu.com ?001 veridicom, inc. all rights reserved. all company and product names are trademarks or registered trademarks of their respective owners. printed in u.s.a. bms-ds-20878-08/2001

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